fbpx
Wikipedia

List of AMD CPU microarchitectures

The following is a list of AMD CPU microarchitectures.

Contents

Historically, AMD's CPU families were given a "K-number" (which originally stood for Kryptonite, an allusion to the Superman comic book character's fatal weakness) starting with their first internal x86 CPU design, the K5, to represent generational changes. AMD has not used K-nomenclature codenames in official AMD documents and press releases since the beginning of 2005, when K8 described the Athlon 64 processor family. AMD now refers to the codename K8 processors as the Family 0Fh processors. 10h and 0Fh refer to the main result of the CPUID x86 processor instruction. In hexadecimal numbering, 0F(h) (where the h represents hexadecimal numbering) equals the decimal number 15, and 10(h) equals the decimal number 16. (The "K10h" form that sometimes pops up is an improper hybrid of the "K" code and Family XXh identifier number.)

Family number Name
Decimal Hex (h)
05 05h K6
06 06h K7
15 0Fh K8 / Hammer
16 10h K10
17 11h K8 & K10 "hybrid"
18 12h K10 (Llano) / K12 (ARM-based)
20 14h Bobcat
21 15h Bulldozer / Piledriver / Steamroller / Excavator
22 16h Jaguar / Puma
23 17h Zen / Zen+ / Zen 2
24 18h Hygon Dhyana
25 19h Zen 3

The Family hexadecimal identifier number can be determined for a particular processor using the freeware system profiling application CPU-Z, which shows the Family number in the Ext. Family field of the application, as can be seen on various screenshots on the CPU-Z Validator World Records website.

Below is a list of microarchitectures many of which have codenames associated:

  • AMD K5 – AMD's first original x86 microarchitecture. The K5 was based on the AMD Am29k micro architecture with the addition of an x86 decoder. Although the design was similar in idea to a Pentium Pro, the actual performance was more like that of a Pentium.
  • AMD K6 – the K6 was not based on the K5 and was instead based on the Nx686 processor that was being designed by NexGen when that company was bought by AMD. The K6 was generally pin-compatible with the Intel Pentium (unlike NexGen's existing processors).
    • AMD K6-2 – an improved K6 with the addition of the 3DNow! SIMD instructions.
    • AMD K6-III Sharptooth – a further improved K6 with three levels of cache – 64 KB L1, 256 KB full-speed on-die L2, and a variable (up to 2 MB) L3.
  • AMD K7 Athlon – microarchitecture of the AMD Athlon classic and Athlon XP microprocessors. Was a very advanced design for its day. First generation was built with a separate L2-cache chip on a board inserted into a slot (A) and introduced extended MMX. The second generation returned to the traditional socket form factor with fully integrated L2-cache running at full speed. The third generation, branded as XP, introduced full support for SSE.
  • AMD K8 Hammer – also known as AMD Family 0Fh. Based on the K7 but was designed around a 64-bit ISA, added an integrated memory controller, HyperTransport communication fabric, L2 cache sizes up to 1 MB (1128 KB total cache), and SSE2. Later K8 added SSE3. The K8 was the first mainstream Windows-compatible 64-bit microprocessor and was released April 22, 2003. K8 replaced the traditional front side bus with a HyperTransport communication fabric. SledgeHammer was the first design which implemented it.
  • AMD K9 – unfinished successor to K8. The codename was recycled at least once until ultimately being dropped before any public mention of it.
  • AMD Family 10h (K10) – based on the K8 microarchitecture. Shared Level 3 Cache, 128-bit floating point units, AMD-V Nested Paging virtualization, and HyperTransport 3.0 are introduced. Barcelona was the first design which implemented it.
  • AMD Family 11h – combined elements of K8 and K10 designs for Turion X2 Ultra / Puma mobile platform.
  • AMD Fusion Family 12h – based on the 10h/K10 design. Includes CPU cores, GPU and Northbridge in the same chip. Llano was the first design which implemented it. Fusion was later re-branded as the APU.
  • AMD Bobcat Family 14h – a new distinct line, which is aimed in the 1 W to 10 W low power microprocessor category. Ontario and Zacate were the first designs which implemented it.
  • AMD Bulldozer Family 15h – the successor to 10h/K10. Bulldozer is designed for processors in the 10 to 220 W category, implementing XOP, FMA4 and CVT16 instruction sets. Orochi was the first design which implemented it. For Bulldozer, CPUID model numbers are 00h and 01h.
  • AMD Zen Family 17h – the successor to Bulldozer. First AMD architecture to implement simultaneous multithreading and Infinity Fabric. Based on 14 nm process, included in the Ryzen CPU line.
    • AMD Zen+ Family 17h – second generation Zen architecture (optimisation and die shrink to 12 nm).
    • AMD Zen 2 Family 17h – successor to the Zen and Zen+ architectures based on 7 nm process, first architecture designed around chiplet technology.
    • AMD Zen 3 Family 19h – new architecture in the optimised 7 nm process, successor to the Zen 2 architecture.
    • AMD Zen 4 – successor to the Zen 3 architecture, planned in 5 nm.
  1. Hesseldahl, Arik (2000-07-06). "Why Cool Chip Code Names Die". forbes.com. Retrieved2007-07-14.
  2. "List of AMD CPU microarchitectures - LeonStudio". LeonStudio - CodeFun. 3 August 2014. Retrieved12 September 2015.
  3. "AMD Unveils 'Chiplet' Design Approach: 7nm Zen 2 Cores Meet 14 nm I/O Die". AnandTech. 2018-11-06. Retrieved2020-10-12.
  4. "AMD Launches AMD Ryzen 5000 Series Desktop Processors: The Fastest Gaming CPUs in the World" (Press release). Santa Clara, California: Advanced Micro Devices, Inc. 2020-10-08. Retrieved2020-10-12.
  5. "AMD Zen 4 processors could destroy Intel thanks to their 5nm designs". TechRadar. 2020-03-25. Retrieved2020-12-10.

List of AMD CPU microarchitectures
List of AMD CPU microarchitectures Language Watch Edit 160 160 Redirected from Zen 4 The following is a list of AMD CPU microarchitectures Contents 1 Nomenclature 2 x86 microarchitectures 3 Other microarchitectures 4 See also 5 References 6 External linksNomenclature EditHistorically AMD s CPU families were given a K number which originally stood for Kryptonite 1 an allusion to the Superman comic book character s fatal weakness starting with their first internal x86 CPU design the K5 to represent generational changes AMD has not used K nomenclature codenames in official AMD documents and press releases since the beginning of 2005 when K8 described the Athlon 64 processor family AMD now refers to the codename K8 processors as the Family 0Fh processors 10h and 0Fh refer to the main result of the CPUID x86 processor instruction In hexadecimal numbering 0F h where the h represents hexadecimal numbering equals the decimal number 15 and 10 h equals the decimal number 16 The K10h form that sometimes pops up is an improper hybrid of the K code and Family XXh identifier number Family number NameDecimal Hex h 05 05h K606 06h K715 0Fh K8 Hammer16 10h K1017 11h K8 amp K10 hybrid 18 12h K10 Llano K12 ARM based 20 14h Bobcat21 15h Bulldozer Piledriver Steamroller Excavator22 16h Jaguar Puma23 17h Zen Zen Zen 224 18h Hygon Dhyana25 19h Zen 3 The Family hexadecimal identifier number can be determined for a particular processor using the freeware system profiling application CPU Z which shows the Family number in the Ext Family field of the application as can be seen on various screenshots on the CPU Z Validator World Records website x86 microarchitectures EditBelow is a list of microarchitectures many of which have codenames associated 2 AMD K5 AMD s first original x86 microarchitecture The K5 was based on the AMD Am29k micro architecture with the addition of an x86 decoder Although the design was similar in idea to a Pentium Pro the actual performance was more like that of a Pentium AMD K6 the K6 was not based on the K5 and was instead based on the Nx686 processor that was being designed by NexGen when that company was bought by AMD The K6 was generally pin compatible with the Intel Pentium unlike NexGen s existing processors AMD K6 2 an improved K6 with the addition of the 3DNow SIMD instructions AMD K6 III Sharptooth a further improved K6 with three levels of cache 64 KB L1 256 KB full speed on die L2 and a variable up to 2 MB L3 AMD K7 Athlon microarchitecture of the AMD Athlon classic and Athlon XP microprocessors Was a very advanced design for its day First generation was built with a separate L2 cache chip on a board inserted into a slot A and introduced extended MMX The second generation returned to the traditional socket form factor with fully integrated L2 cache running at full speed The third generation branded as XP introduced full support for SSE AMD K8 Hammer also known as AMD Family 0Fh Based on the K7 but was designed around a 64 bit ISA added an integrated memory controller HyperTransport communication fabric L2 cache sizes up to 1 MB 1128 KB total cache and SSE2 Later K8 added SSE3 The K8 was the first mainstream Windows compatible 64 bit microprocessor and was released April 22 2003 K8 replaced the traditional front side bus with a HyperTransport communication fabric SledgeHammer was the first design which implemented it AMD K9 unfinished successor to K8 The codename was recycled at least once until ultimately being dropped before any public mention of it AMD Family 10h K10 based on the K8 microarchitecture Shared Level 3 Cache 128 bit floating point units AMD V Nested Paging virtualization and HyperTransport 3 0 are introduced Barcelona was the first design which implemented it AMD Family 11h combined elements of K8 and K10 designs for Turion X2 Ultra Puma mobile platform AMD Fusion Family 12h based on the 10h K10 design Includes CPU cores GPU and Northbridge in the same chip Llano was the first design which implemented it Fusion was later re branded as the APU AMD Bobcat Family 14h a new distinct line which is aimed in the 1 W to 10 W low power microprocessor category Ontario and Zacate were the first designs which implemented it AMD Jaguar Family 16h the successor to Bobcat Kabini and Temash CPUID model numbers are 00h 0Fh AMD Puma Family 16h 2nd gen the successor to Jaguar Beema and Mullins CPUID model numbers are 30h 3Fh AMD Bulldozer Family 15h the successor to 10h K10 Bulldozer is designed for processors in the 10 to 220 W category implementing XOP FMA4 and CVT16 instruction sets Orochi was the first design which implemented it For Bulldozer CPUID model numbers are 00h and 01h AMD Piledriver Family 15h 2nd gen second generation Bulldozer First optimisation CPUID model numbers are 02h earliest Vishera Piledrivers and 10h 1Fh AMD Steamroller Family 15h 3rd gen third generation Bulldozer Second optimisation and die shrink to 28 nm CPUID model numbers are 30h 3Fh AMD Excavator Family 15h 4th gen fourth generation Bulldozer Final optimisation CPUID model numbers are 60h 6Fh later updated revisions have model numbers 70h 7Fh AMD Zen Family 17h the successor to Bulldozer First AMD architecture to implement simultaneous multithreading and Infinity Fabric Based on 14 nm process included in the Ryzen CPU line AMD Zen Family 17h second generation Zen architecture optimisation and die shrink to 12 nm AMD Zen 2 Family 17h successor to the Zen and Zen architectures based on 7 nm process first architecture designed around chiplet technology 3 AMD Zen 3 Family 19h new architecture in the optimised 7 nm process successor to the Zen 2 architecture 4 AMD Zen 4 successor to the Zen 3 architecture planned in 5 nm 5 Other microarchitectures EditAMD Am2900 Bit slice architecture designed in 1975 AMD Am29000 Popular line of 32 bit RISC microprocessors and microcontrollers AMD K12 ARM64 ARMv8 ASee also EditList of Intel CPU microarchitectures List of AMD microprocessors Table of AMD processorsReferences Edit Hesseldahl Arik 2000 07 06 Why Cool Chip Code Names Die forbes com Retrieved 2007 07 14 List of AMD CPU microarchitectures LeonStudio LeonStudio CodeFun 3 August 2014 Retrieved 12 September 2015 AMD Unveils Chiplet Design Approach 7nm Zen 2 Cores Meet 14 nm I O Die AnandTech 2018 11 06 Retrieved 2020 10 12 AMD Launches AMD Ryzen 5000 Series Desktop Processors The Fastest Gaming CPUs in the World Press release Santa Clara California Advanced Micro Devices Inc 2020 10 08 Retrieved 2020 10 12 AMD Zen 4 processors could destroy Intel thanks to their 5nm designs TechRadar 2020 03 25 Retrieved 2020 12 10 External links EditAMD website Retrieved from https en wikipedia org w index php title List of AMD CPU microarchitectures amp oldid 1040159397 x86 microarchitectures, wikipedia, wiki, book,

books

, library,

article

, read, download, free, free download, mp3, video, mp4, 3gp, jpg, jpeg, gif, png, picture, music, song, movie, book, game, games.